Mar 8, 2013

Macronix Breaks the 128 Mbit Barrier for Serial Flash in an Innovative and Simple Way

Serial flash memory using the Serial Peripheral Interface (SPI) utilizes a 24-bit addressing scheme that limits the maximum density to 128 Mbits. However, to be able to add new features, applications require greater densities. For these serial flash applications requiring more storage, many system engineers have been forced to search for alternative memory solutions.

While other non-volatile memory solutions will work, they don’t offer the well known advantages of serial flash - such as lower pin-count, smaller footprint, simplified board layout&design, reduced system noise/EMI, and reduced system cost. The ideal solution would be a serial flash device capable of breaking the 128 MB density barrier. As leading manufacturer of serial flash memory, Macronix has solved this problem by providing an innovative and simple operation mode; it extends the addressable range from 24-to 32-bits.

The increased address range will accommodate future serial flash memories starting with 256 MB to densities as large as 32 GB. Macronix is currently offering serial flash densities up to 256 MB, but with 32-bit addressing, there is plenty of room for future density increases.

Potential market applications are mainly system applications related to the storage of large application image files, as WiMAX, high-end data communication, set-top boxes, storage, high-end server and projector applications. Since high-density serial flash memory can provide high capacity storage combined with a low pin count, it’s the ideal solution for system processors/ controllers storing large program code images in non-volatile memory. In addition to code storage, a high density serial flash will have sufficient space for data storage, e.g. user data/configuration files that can be stored in the memory space not utilized by the code image. In other words, the market urge to adopt high-density serial flash memory is getting stronger.

There are up to 11 commands that require a 24-bit address for operation. Since there is already a large number of commands requiring an address, adding a new set of 32- bit address commands would double them. This would add complexity to the design of the silicon and increase its cost. To avoid this, the 256 Mbit serial flash can switch between addressing modes with only two newly added commands.

The actual method of operation is similar to the existing general command format where CS# is first driven low, followed by clocking in the 8-bit command for either entering (e.g. B7) or exiting (e.g. E9) the 32- bit addressing mode. Afterwards, one can use the standard commands in the normal fashion as long as one uses the appropriate number of address bits for the selected addressing mode.

Backwards compatibility to existing serial flash products was an important design consideration. This was fully achieved by the following methods:
  • The 256 MB memory is always power-up in 24-bit addressing mode.
  • 32-bit addressing mode is needed to access the hole 256 MB.
  • The contents can be dumped to DRAM in 24-bit addressing mode.
  • Since using an internal 32-bit address counter, the entire content can be accessed in 24-bit address mode.
That means that neither the processor nor the controller has to be modified and existing software using the 24-bit addressing scheme can be used.

Macronix breaks through the serial flash density barrier with a new 32-bit address mode that enables memory densities of 256 Mb and higher. System designers can continue to use the SPI structure for their new high density applications and still benefit from cost advantages of low pin count devices. Software engineers don’t have to worry about rewriting software but can continue to use their existing software and enhance it to take advantage of additional memory space. For the industry, this represents a milestone in the advancement of high-density serial flash and expands wideranging applications of serial flash memory.


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